Contact and junction engineering in bulk FinFET technology for improved ESD/latch-up performance with design trade-offs and its implications on hot carrier reliability

摘要

In this work, the role of contact and junction engineering to improve ESD, Latch-up robustness as well as hot carrier reliability is discussed using 3D TCAD simulations. A FinFET technology calibrated to published data of a 14 nm technology is investigated. S/D contact and junction engineering in FinFETs can boost the ESD robustness by a factor of 6x compared to the basic process, however, adversely affects the hot carrier reliability. The trade-off of the essential technology guidelines for maximizing the overall reliability behavior and ESD/LU robustness are derived. Based on these guidelines, a hybrid contact/junction technology is proposed.