Partial product generator for signed binary multipliers

摘要

Signed binary multiplication is the essential part of all digital processing needs. The digital processing is inseparable part in microprocessor, microcontroller, digital image processing, data manipulation, etc. In this paper, a method to generate the partial products which are generated in the multiplication process is being proposed, in order to reduce the computational efforts in the multiplication process. We illustrated the booth method for radix-2, radix-4 and for signed multiplication. We also include a redundant adder which increases the speed of addition process which is required in the multiplication process. To implement the redundant multiplier and redundant adder booths algorithm radix-4 is used. The booth encoding and decoding technique is used to implement the redundant multiplier. To speed up the redundant multiplication process a method is proposed to eliminate the error correction word which is required in the redundant binary multiplication process. In this paper we will deal with different approaches for generating the partial products and to reduce the partial products needed for multiplication process. The methods are implemented in Xilinx, the analysis for each multiplier is made.