Testing pre-bonded through silicon vias (TSVs) is vital to retain a high yield for three-dimensional integrated circuits (3D IC). In this paper, we present a scan-based method for the pre-bond test of TSVs. The proposed circuit is able to detect open and short defects of TSVs, which is well compatible with digital technology. The inherent compact and low-power capabilities are suitable for testing a large number of TSV in an array.
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