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Design methodology of standard analog circuit block using EKV MOSFET model and validation using BSIM3v3 MOSFET model

机译:使用EKV MOSFET模型的标准模拟电路模块的设计方法和使用BSIM3v3 MOSFET模型的验证

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摘要

Designing of an IC is an art which a designer masters by its experience of multiple simulation of the circuits and evaluating transistor sizes to meet contrasting objectives of gain-bandwidth product, power consumption, dynamic range non-linear distortion, etc. The designer adopt multi-pronged approach to meet its specification by examining the circuit by design intuition using analytical approach and then further optimizing by simulating circuit on simulator. The performance of the circuit is enhanced using optimization algorithm with multiple constraints but it require the circuit performance be modeled with mathematical expression. In this paper we use EKV2.6 model parameters which is extracted and optimized on different bins of BSIM3v3 model on 0.18μ technology to design standard analog building blocks like single stage common source amplifier, differential amplifier and OTA using g/lD ratio design methodology. Finally all the design are validated on HSPICE using BSIM3v3 MOSFET model with matching within limit of 10%. This capability of above work shows a complete procedure in the design for a standard specification of OTA.
机译:IC的设计是一门艺术,它是设计人员通过对电路进行多次仿真并评估晶体管尺寸来达到增益带宽乘积,功耗,动态范围非线性失真等相反目标的经验。通过使用分析方法根据设计直觉来检查电路,然后通过在模拟器上仿真电路来进一步优化,从而达到满足其规格的目的。使用具有多个约束条件的优化算法可以增强电路的性能,但是它需要使用数学表达式对电路性能进行建模。在本文中,我们使用EKV2.6模型参数,该参数在0.18μ技术的BSIM3v3模型的不同仓上提取并优化,以使用g / lD比设计方法设计标准模拟构建模块,如单级共源放大器,差分放大器和OTA。最后,所有的设计都在HSPICE上使用BSIM3v3 MOSFET模型进行了验证,匹配范围在10%以内。上述工作的这种能力显示了针对OTA标准规范的设计中的完整过程。

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