SI/PI Co-simulation including voltage regulating circuitry for high-performance multi-chip package

摘要

As new NAND specification such as Toggle 2.0 has been standardized and developed, supply voltage has been reduced from 3.3V to 1.8V because of the adoption of high-speed I/O. Accordingly, due to issues of the backward compatibility with previous specifications and the power budget, voltage regulator implemented in a package should supply the power to the I/Os. In this paper, we propose the advanced SI/PI co-simulation methodology including voltage regulator circuitry for high-performance multi-chip packages. It is shown that the proposed simulation can detect the vulnerability of PDN related to the output of voltage regulator in the design stage of high-perfomance multi-chip packages, and can help optimize PCB design including PDN. It is also shown that the simulation are in good agreement with measurements.