A variable-threshold voltage technique to enhance the linearity of folding-integration/cyclic cascaded ADCs

摘要

A variable-threshold voltage technique for folding-integration (FI) analog-to-digital converters (ADCs) with 1-bit quantizer is proposed to enhance the linearity of folding-integration/cyclic cascaded (FICC) ADCs. Based on the modeling and analysis of behavioral operation of FICC ADCs, a variable-threshold voltage is applied to the 1-bit sub-ADC of FI operation to decrease errors from offset of comparator and imperfect amplification of switch-capacitor amplifier. The variable-threshold voltage is designed to be automatically adjustable by measurement and feedback control according to the scale of input signal of FICC ADC. The effectiveness of proposed technique is confirmed by behavioral-level simulation. Then the technique is implemented and simulated in 65nm CMOS technology.