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Phase-change-memory-based storage elements for configurable logic

机译:可配置逻辑的相变存储基础存储元素

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Back-end-of-line non-volatile resistive memories like Phase Change Memories (PCMs) are promising to solve memory issues in different architectures. In this paper, we investigate the usage of PCM to build an elementary configuration memory node for reconfigurable logic, such as Field-Programmable Gate Arrays (FPGAs). We propose an elementary circuit realized by 2 resistive memories and 1 programming transistor able to store a configuration voltage. We investigate the proposed node in terms of area and write time and we assess its impact on complex circuits. We show that the elementary memory node yields an improvement in area and write time of 1.5x and 16x respectively vs. a regular Flash implementation. Implemented in FPGAs, the memory node yields a delay reduction up to 51%, thanks to the reduction of dimensions and low on-resistance of PCMs.
机译:LIES的后端非易失性电阻存储器如相变存储器(PCM)是有希望解决不同架构中的记忆问题。在本文中,我们调查PCM的用法来构建用于可重新配置逻辑的基本配置存储器节点,例如现场可编程门阵列(FPGA)。我们提出了一个由2个电阻存储器和1个编程晶体管实现的基本电路,能够存储配置电压。我们在区域和写入时间方面调查所提出的节点,我们评估其对复杂电路的影响。我们表明,基本存储器节点产生的区域和写入时间为1.5倍和16倍,与常规闪光实现。由于尺寸的减小和PCM的低电阻,存储节点在FPGA中实现,内存节点会产生高达51%的延迟降低。

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