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A 14.8μVRMS integrated noise output capacitor-less low dropout regulator with a switched-RC bandgap reference

机译:14.8μV RMS 集成噪声输出电容器较少的低压丢失调节器,具有开关RC带隙参考

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Achieving low noise is becoming an important requirement in linear supply regulators for RF and mixed-signal SoC applications. A low-noise, low dropout regulator using switched-RC bandgap reference and a multi-loop, unconditionally stable error amplifier for output capacitor-less operation is presented. Switched-RC sample-and-hold filtered bandgap reference and current-mode chopped error amplifier techniques are used for reducing output noise of the LDO. A switched capacitor notch filter is used to ensure chopping ripple free output voltage. The proposed techniques reduce the 10Hz to 100kHz integrated output noise of the LDO from 95.3uVrms to 14.8μVrms. The LDO delivers a maximum load current of 100mA with a dropout voltage of 230mV and quiescent current consumption of 40μA. It achieves a PSR of 50dB at 10kHz for programmable output voltage range of 1V-3.3V. Fabricated in a 0.25μm CMOS process, the LDO core occupies an area of 0.18mm.
机译:实现低噪声正在成为RF和混合信号SOC应用的线性供应调节器中的重要要求。使用开关RC带隙参考的低噪声,低压丢失调节器和多环,无条件稳定的误差放大器,用于输出电容器的操作。开关RC采样​​和保持过滤的带隙参考和电流模式切碎的误差放大器技术用于降低LDO的输出噪声。开关电容陷波滤波器用于确保斩波自由输出电压。所提出的技术将LDO的10Hz降至100KHz的集成输出噪声从95.3uvrms降至14.8μVrms。 LDO可提供100mA的最大负载电流,丢弃电压为230mV,静态电流消耗为40μA。它在10kHz下实现了50dB的PSR,可编程输出电压范围为1V-3.3V。 LDO芯在0.25μm的CMOS工艺中制造,占地面积为0.18mm。

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