CMOS charge pumps using cross-coupled charge transfer switches with improved voltage pumping gain and low gate-oxide stress for low-voltage memory circuits

摘要

To overcome the problems of the modified Dickson pump like NCP-2, a new pump (CCTS-1) where simple voltage doublers are cascaded in series and each of them has cross-coupled configuration is studied in this paper for possible use in low-voltage EEPROMs and DRAMs. Though this concept of cascading doublers has been previously proposed, it is firstly addressed in this paper that CCTS-1 has the lower gate-oxide stress, the improved voltage pumping gain, and the better power efficiency than NCP-2 so that CCTS-1 can be more suitable for the multi-stage pump in particular at low VCC. In addition, CCTS-2 is proposed to overcome the degraded body-effect of CCTS-1 without using boosted clocks when the stage number is large.