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A Small “Dead-Area” Packaging Approach for Front Side Illuminated Photodiode

机译:用于前侧照明光电二极管的小“死区”包装方法

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To increase the density of packaging, we propose a novel three-dimensional high-aspect-ratio packaging approach for conventional front side illuminated photodiode, which is able to fabricate a narrow spacing between the edge of package and the edge of die. Sliver-epoxy adhesive is used as conductive layer and formed over the SU8 photoresist by fluid dispensing or stencil printing process. In addition, a package substrate is designed and fabricated. The electro-optical properties of photodetectors, which is based on silicon photomultiplier, are measured, such as current-voltage characteristic, dark count rate, photoelectron spectrum, and photon detection efficiency. The test results show that there is no significant differences of electro-optical characteristics between this packaging approach and conventional wire bonding. Meanwhile, the minimum area of photodetector packaged successfully is 11.02 mm2 (3.36mm×3.28mm) and it is not 1.2 times greater than that of the chip before packaging. This packaging approach is promising for compact packaging, where the flip-chip and TSV are hard to carry out, and this technology, at the same time, makes it possible to obtain succinctly and cost-effectively a chip-scale package.
机译:为了提高包装的密度,我们提出了一种用于传统前侧照射光电二极管的新型三维高纵横比包装方法,其能够在封装边缘和模具的边缘之间制造窄间距。粘合剂用作导电层并通过流体分配或模版印刷工艺在SU8光致抗蚀剂上形成。另外,设计和制造封装基板。测量基于硅光电倍增器的光电探测器的电光特性,例如电流 - 电压特性,暗计数率,光电子谱和光子检测效率。测试结果表明,该包装方法与传统引线键合之间的电光特性没有显着差异。同时,成功包装的光电探测器的最小面积是11.02mm2(3.36mm×3.28mm),并且在包装之前,它不是芯片的1.2倍。这种包装方法是对紧凑型包装的承诺,其中倒装芯片和TSV难以执行,并且该技术同时使得可以简洁地获得芯片级包装的简洁和成本有效。

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