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Influence of Negative DIBL Effect on MOSFET Effective Drive Current and CMOS Circuit

机译:负极DIBL效应对MOSFET有效驱动电流和CMOS电路的影响

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In this study, the influence of the negative DIBL (NDIBL) effect of a negative capacitance nanowire filed-effect-transistor (negative capacitance (NC) NWFET) on MOSFET effective drive current (Ieff) and CMOS circuit performance were analyzed by employing a custom-built SPICE model. The Ieff of NC NWFET increased by ~12% due to NDIBL effect. A 7-stage ring oscillator was simulated to analyze the CMOS circuit energy-delay, and it shown that significant delay reduction, at iso-energy and iso-area, can be achieved due to NDIBL effect of NC NWFET. A 6T SRAM cell was investigated, and enhanced hold and read static noise margins (SNM) are achieved due to NDIBL effect. Moreover, several methods of increasing NDIBL effect were proposed.
机译:在该研究中,负电容纳米线归档效应 - 效应 - 晶体管(负电容(NC)NWFET)对MOSFET有效驱动电流的影响(I)的影响(i eff 通过采用定制的Spice模型分析CMOS电路性能。 我 eff 由于NDIBL效应,NC NWET增加了〜12%。 模拟了7级环形振荡器以分析CMOS电路能量延迟,并且如NC NWFET的NDIBL效应,ISO-能量和ISO区的显着延迟降低。 研究了6T SRAM电池,由于NDIBL效应,增强的保持和读取静电噪声边距(SNM)实现。 此外,提出了几种增加NDIBL效应的方法。

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