Heterojunction TFET Scaling and resonant-TFET for steep subthreshold slope at sub-9nm gate-length

摘要

The Tunneling Field Effect Transistor (TFET) is of interest for future low-power technologies due to its steep subthreshold-slope (SS) [1, 2]. In addition to understanding TFET's prospects for future technology nodes [3], we also need to assess if it enables continued scaling required for increasing transistor density. GaSb/InAs heterojunction TFET (Het-j TFET) is one of the leading TFET options due to its high drive-current [4]. In this paper, double-gate (DG) and nanowire (NW) Het-j TFETs (Fig. 1) are atomisticly modeled and compared to a MOSFET down to Lg~9nm, i.e. ITRS 2022 node [5]. To achieve TFET characteristics superior to a MOSFET, its DG body has to be extremely thin, so a NW TFET is therefore preferred due to its more relaxed thickness and better transistor characteristics. A new device - the Resonant-TFET (R-TFET), is proposed, with SS~25mV/dec over ~3.5 decades of current, enabling the scaling of tunneling transistors to sub-9nm gate-lengths (Lg).