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Single Metal/Dual High-k Gate Stack with Low V{sub}(th) and Precise Gate Profile Control for Highly Manufacturable Aggressively Scaled CMISFETs

机译:具有低V {Sub}(Th)的单金属/双高k门堆叠,以及精确的栅极轮廓控制,用于高度可制造的积极缩放CMISFET

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We have proposed a single metal/dual high-k (SMDH), low-V{sub}(th) gate stack for aggressively scaled CMISFETs. The V{sub}(th) is controlled by MgO- and Al{sub}2O{sub}3-containing high-k for n and pMISFETs, respectively. The gate profile can be more easily controlled by taking advantage of a common W/TiN gate stack on both high-k's. We have successfully obtained 0.21 and -0.33 V of V{sub}(th) for a 1-μm long n and pMISFET by the proposed SMDH gate stacks. We also found that MgO suppresses PBTI and that it enhances electron mobility.
机译:我们提出了一种用于积极缩放CMISFET的单个金属/双高k(SMDH),低V {SUB}(TH)栅极堆栈。 v {sub}(th)分别由MgO-和Al {Sub} 2o {sub} 3的N和PMISFET控制。通过利用在高k的共同的W / TIN栅极堆叠中,可以更容易地控制栅极轮廓。通过所提出的SMDH栅极堆叠,我们成功获得了1-μm长的N和PMISFET的0.21和-0.33V的V {Sub}(Th)。我们还发现MgO抑制了PBTI并且它增强了电子迁移率。

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