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Fully back-end TSV process by Cu electro-less plating for 3D smart sensor systems

机译:通过用于3D智能传感器系统的无电镀铜的完全后端TSV工艺

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A fully back-end process for high-aspect ratio (HAR) Through Silicon Vias (TSVs) for 3D smart sensor systems where the sensors and the electronics are fabricated on the opposite sides of the wafer, is developed. Atomic Layer Deposition (ALD) of TiN provides a highly conformal barrier as well as a seed layer for metal plating. Cu electro-less plating on the chemically activated TiN surfaces is applied to uniformly fill the TSVs in a significantly shorter time (2 hrs for 300 μm deep and 20 μm wide TSVs) than with Cu bottom-up electroplating (>20hrs). The process is CMOS compatible and can be performed after the last metallization step, making it a fully back-end process (VIA-last approach). Wafers containing metal interconnections on both sides are in fact used as demonstrator. Four-terminal 3D Kelvin structures are fabricated and characterized. An average resistance value of 190 mΩ is measured for 300 μm deep TSVs with an aspect ratio of 15.
机译:开发了一种通过硅通孔(TSV)的高纵横比(HAR)的完全后端过程,用于3D智能传感器系统,其中传感器和电子器件在晶片的相对侧上制造在晶片的相对侧上。锡的原子层沉积(ALD)提供高度保形屏障以及用于金属电镀的种子层。 Cu在化学活化的锡表面上的电镀镀在化学活化的锡表面上施加以在显着较短的时间内(2小时为300μm深度和20μm宽TSV)均匀地填充TSV,而不是Cu自下而上的电镀(> 20Hr)。该过程是CMOS兼容的,并且可以在上次金属化步骤之后执行,使其成为完全后端过程(通过最后一个方法)。含有两侧金属互连的晶片实际上是用作示威者。制造和表征四端3D开尔文结构。平均电阻值为190mΩ,测量300μm深度TSV,宽高的比率为15。

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