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Multi-bit Gray Code Counter Based on FPGA

机译:基于FPGA的多位灰色代码计数器

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摘要

According to the characteristics of Gray code,a method of separate count is presented. The 32-bit Gray code counter is programmed with VHDL on the platform of Quartus 2,and the simulation waveforms are achieved. The results indicate that Gray code counter counts accurately in the case of high clock frequency and obviously eliminates the emergence ofglitch. Compared with the ordinary binary counter,it has high stability and flexibility. This method is a reference to Hesicrn of counter.
机译:根据格雷码的特征,提出了一种单独计数的方法。 32位灰度码计数器在Quartus 2的平台上使用VHDL进行编程,并且实现了模拟波形。结果表明,在高时钟频率的情况下,灰色代码计数器准确地计数,显然消除了恐怖的出现。与普通二元计数器相比,它具有高稳定性和灵活性。该方法是对Hearicrn的计数器的引用。

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