首页> 外文会议>Proceedings of the 2010 5th IEEE International Conference on Nano/Micro Engineered and Molecular Systems >Fabrication of Sub-100-nm silicon nanowire devices on SOI wafer by CMOS compatible fabrication process
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Fabrication of Sub-100-nm silicon nanowire devices on SOI wafer by CMOS compatible fabrication process

机译:通过CMOS兼容制造工艺在SOI晶片上制造100纳米以下的纳米硅纳米线器件

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A technique for the fabrication of planar silicon nanowires (SiNWs) on SIMOX-SOI (Separation by Implanted Oxygen-Silicon on Insulator) wafers using sidewall transfer lithography is presented, which can be used as field effect devices for biomolecular detections. Different from the existing synthesis process, this method is based on standard “top-down” semiconductor process. Aluminum sidewall is applied in this work on account of its high etching selectivity over both silicon and oxide, so as to preserve the thin oxide layer of SIMOX-SOI for reliable electrical isolation which is considered crucial to the weak signal detection. Silicon nanowires with the dimensions of 50 nm × 90 nm × 5 µm have been successfully demonstrated by this CMOS compatible fabrication process.
机译:提出了利用侧壁转移光刻技术在SIMOX-SOI(通过在绝缘体上注入氧-硅进行分离)晶圆上制造平面硅纳米线(SiNWs)的技术,该技术可用作生物分子检测的场效应器件。与现有的合成工艺不同,此方法基于标准的“自顶向下”半导体工艺。由于铝侧壁在硅和氧化物上都具有很高的刻蚀选择性,因此在此工作中使用了铝侧壁,以便保留SIMOX-SOI的薄氧化层,以实现可靠的电隔离,这对于弱信号检测至关重要。通过这种兼容CMOS的制造工艺已成功证明了尺寸为50 nm×90 nm×5 µm的硅纳米线。

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