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Silicon-on-insulator and CMOS-on-SOI double film fabrication process with a coplanar silicon and isolation layer and adding a second silicon layer on one region

机译:具有共面硅和隔离层并在一个区域上添加第二个硅层的绝缘体上硅和CMOS上SOI双层薄膜制造工艺

摘要

Silicon is formed at selected locations on a silicon-insulator (SOI) substrate during fabrication of selected electronic components, including resistors, capacitors, and diodes. The silicon location is defined using a patterned, removable mask, and the silicon may be applied by deposition or growth and may take the form of polysilicon or crystalline silicon. Electrostatic discharge (ESD) characteristics of the SOI device is significantly improved by having a thick double layer of silicon in selected regions.
机译:在制造包括电阻器,电容器和二极管的选定电子组件的过程中,在硅绝缘体(SOI)衬底上的选定位置上形成了硅。硅的位置使用图案化的可移动掩模来定义,并且硅可以通过沉积或生长来施加,并且可以采取多晶硅或结晶硅的形式。通过在选定区域中具有厚的双层硅层,可以显着改善SOI器件的静电放电(ESD)特性。

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