In place growth of vertical Si nanowires for surround gated MOSFETs with self aligned contact formation

摘要

We demonstrate the simultaneous vertical integration of self contacting and highly oriented nanowires (NWs) into airbridge structures. With the use of conventional semiconductor processing techniques and vapour-liquid-solid (VLS) growth a suspended vertical NW architecture is formed on a silicon on insulator (SOI) substrate where the nanodevice will later be fabricated on. The VLS grown Si-NWs are contacted to prepatterned airbridges by a self aligned process and there is no need for post-growth NW assembly or alignment. To demonstrate the potential of this method surround gated vertical MOSFETs have been fabricated with a highly simplified integration scheme combining top-down and bottom-up approaches.