Benefits and Limitations of Universal, low-pin count Automated Test Equipment for Printed Circuit Assemblies

摘要

This paper discusses the benefits and limitations of universal, low-pin count Automated Test Equipment for Printed Circuit Assembly (PCA) testing utilizing the test access port (TAP) defined in IEEE Std. 1149.1. The test equipment under consideration allows the application of a wide variety of JTAG/Boundary Scan connectivity and pseudo functional tests, ideal for use as a desktop test system for prototype verification and production test. In particular, we will present ways of creating test applications that utilize embedded test resources in the Unit Under Test (UUT) and tester channels provided by the ATE in a compact and all-inclusive fashion. The paper will also discuss overall cost of test reductions achievable with such test equipment.