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Improved evaluation of DRAM transistors and accurate resistance measurement for real chip contacts by nano-probing technique

机译:通过纳米探测技术改进了对DRAM晶体管的评估,并针对实际芯片触点进行了精确的电阻测量

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In this study we have measured and analyzed characteristics of real transistors on dynamic random access memories (DRAM) including cell transistor by using nano-probing system for improved failure analysis. Measuring results of the conventional pad probing and nano-probing were compared on test element group (TEG) patterns of large transistors. The transistor characteristics of nano-probing results were evaluated for the each layer of DRAM structure with comparing the TEGs pad probing results. We also have measured sheet resistance (Rs) and contact resistance (Rc) on source and drain of real transistor bit line contacts (BLC) by nano-probing with transmission line model (TLM) method. We could find the effect of floating BLC was negligible and the effective resistance was only depending on the facing length of the contact plug bottom.
机译:在这项研究中,我们已经通过使用纳米探测系统对动态随机存取存储器(DRAM)(包括单元晶体管)上的真实晶体管的特性进行了测量和分析,以改进故障分析。在大型晶体管的测试元件组(TEG)图案上比较了常规焊盘探测和纳米探测的测量结果。通过比较TEG焊盘的探测结果,对DRAM结构的每一层评估了纳米探测结果的晶体管特性。我们还通过传输线模型(TLM)方法进行纳米探测,测量了真实晶体管位线触点(BLC)的源极和漏极上的薄层电阻(Rs)和接触电阻(Rc)。我们发现浮动BLC的影响可忽略不计,有效电阻仅取决于接触塞底部的面对长度。

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