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Architecture and finite precision optimization for layered LDPC decoders

机译:分层LDPC解码器的体系结构和有限精度优化

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Layered decoding is known to provide efficient and high-throughput implementation of LDPC decoders. In the practical hardware implementation of layered decoders, the performance is strongly affected by quantization. The finite precision model determines the area of the decoder, which is mainly composed of memory, especially for long frames. To be specific, in the DVB-S2,-T2 and -C2 standards, the memory can occupy up to 70% of the total area. In this paper, we focus our attention on the optimization of the number of quantization bits. Message saturation and memory size optimization are considered for the case of a DVB-S2 decoder. We show that the memory area can be reduced by 28% compared to the state-of-the-art, without performance loss.
机译:已知分层解码可提供LDPC解码器的高效且高吞吐量的实现。在分层解码器的实际硬件实现中,性能受到量化的强烈影响。有限精度模型确定解码器的区域,该区域主要由内存组成,尤其是对于长帧。具体来说,在DVB-S2,-T2和-C2标准中,内存最多可占总面积的70%。在本文中,我们将注意力集中在量化位数的优化上。对于DVB-S2解码器,考虑了消息饱和和内存大小优化。我们证明,与现有技术相比,存储区域可以减少28%,而不会造成性能损失。

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