首页> 外文会议>Electron Devices Meeting (IEDM), 2009 >Reliability improvement in planar MONOS cell for 20nm-node multi-level NAND Flash memory and beyond
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Reliability improvement in planar MONOS cell for 20nm-node multi-level NAND Flash memory and beyond

机译:用于20nm节点多级NAND闪存的平面MONOS单元的可靠性提高

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20 nm-node planar MONOS cell which has improved reliability is developed. Extremely wide program/erase Vth window and good retention characteristics after cycling stress are obtained by buried charge cell structure. Moreover, Vth shift by interference between adjacent cells has smaller dependence on the cell-cell space than Vth window improvement when the half pitch is constant. These results show that the buried charge planar MONOS cell is suitable for Flash memory with 20 nm-node and beyond.
机译:开发出可靠性更高的20 nm节点平面MONOS单元。通过掩埋的电荷单元结构,可以实现极宽的编程/擦除Vth窗口和循环应力后的良好保留特性。此外,当半间距恒定时,与相邻单元之间的干扰引起的Vth移位相比,与Vth窗口改进相比,对单元单元空间的依赖性更小。这些结果表明,埋入式电荷平面MONOS单元适用于节点为20 nm或更高的闪存。

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