Efficient modulo 2/sup n/+1 tree multipliers for diminished-1 operands

摘要

In this work we propose a new method for designing modulo 2/sup n/+l multipliers for diminished-1 operands. Our multipliers compared to the already known tree architecture offer enhanced operation speed for the majority of n values, with similar area complexities. They also have very regular structure, and can be pipelined at the full-adder level.