COPPER CMP WITH LINEAR PLANARIZATION TECHNOLOGY~(TM)

摘要

Stringent requirements for design rules of 180 nm and beyond are creating a need for the integration of next-generation metallization and dielectric materials. Copper has a higher current-carrying capability, superior electromigration resistance, and lower resistivity than aluminum. Damascene has become the process of choice for copper interconnects due to the difficulty in patterning copper by dry etch, and copper chemical mechanical planarization (CMP) is a pivotal part of damascene processes. In terms of CMP characteristics, the main requirements for copper application are controlling the removal profile to ensure uniformity across the wafer, minimizing metal loss, minimizing feature size and pattern-density sensitivity, and achieving a clean post-CMP surface. In addition to these technical requirements, today's production CMP systems must provide robust process endpoint control and a low cost of ownership for maximum profitability. This paper presents copper CMP results with Lam's Teres~(~R) Linear Planarization Technology~(TM) (LPT~(TM)). Within-wafer and within-die uniformity control are examined with LPT's air bearing platen technology. The impact on the planarity (dishing and erosion) by non-optimized within-wafer uniformity is illustrated. The copper endpoint technology for a linear polisher is demonstrated. Post copper-CMP clean results with proprietary cleaning chemistries are presented. The challenges for copper and low k dielectric integration for 130 nm and beyond will be addressed.