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RTL-based functional test generation for high defects coverage in digital SOCs

机译:基于RTL的功能测试生成可在数字SOC中实现高缺陷覆盖率

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Functional test is long viewed as unfitted for production test. The purpose of this contribution is to propose a RTL-based test generation methodology which can be rewardingly used both for design validation and to enhance the test effectiveness of classic, gate-level test generation. Hence, a RTL-based defect-oriented test generation methodology is proposed, for which a high defects coverage (DC) and a relatively short test sequence can be derived, thus allowing low-energy operation in test mode. The test effectiveness, regarding DC, is shown to be weakly dependent on the structural implementation of the behavioral description. The usefulness of the methodology is ascertained using the VeriDOS simulation environment and the CMUDSP ITC'99 benchmark circuit.
机译:功能测试长时间视为未替换的生产测试。本贡献的目的是提出基于RTL的测试生成方法,可以有助于设计验证,并提高经典栅极级测试生成的测试效果。因此,提出了一种基于RTL的缺陷的测试生成方法,其中可以导出高缺陷覆盖(DC)和相对短的测试序列,从而允许测试模式下的低能量操作。关于DC的测试效果被证明是弱依赖于行为描述的结构实施。使用Veridos仿真环境和CMUDSP ITC'99基准电路确定方法的有用性。

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