Deep-trap SILC (stress induced leakage current) model for nominal and weak oxides

摘要

We have successfully developed a new quantitative ITAT (inelastic trap-assisted tunneling) based SILC (stress induced leakage current) model by introducing traps with a deep energy level of around 4.0 eV which can explain two field dependencies, i.e. Fowler-Nordheim (FN) field and the direct tunneling (DT) field dependence. For simple analytical models, we introduce the most favorable trap position, which gives the largest contribution to the leakage current. A-mode and B-mode SILC are the leakage currents in the nominal oxide region and at the weak oxide spots, respectively, which can be deduced by the large difference in the area density between the single trap area (/spl sim/1/spl times/10/sup 11/ cm/sup -2/) and the multi-trap path (/spl sim/1/spl times/10/sup 2/ cm/sup -2/). Our model suggests that for flash EPROM, a 13 nm-oxide thickness is required for 1.0 fC on the floating gate to last 100 years.