首页> 外文会议>Electronic Components and Technology Conference, 1991. Proceedings., 41st >Electrical measurement and modeling of co-fired ceramic multi-chip substrates for high speed application
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Electrical measurement and modeling of co-fired ceramic multi-chip substrates for high speed application

机译:用于高速应用的共烧陶瓷多芯片基板的电学测量和建模

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Some of the important electrical properties of cofired ceramic multilayer substrates used for high-speed digital application have been investigated for the purpose of evaluating performance and improving the design process. A test vehicle has been designed to achieve this target. The measurement setup and procedures utilizing time-domain reflectometry techniques are described. Data collected from the test vehicle are summarized and discussed. Computer modeling has been used to help understand the interpret the data, and can be used for future design guidelines. Several cases of crosstalk configuration have been studied. The effect of risetime, line length, and impedance mismatch on the crosstalk was measured and compared with the modeling results. The test vehicle also includes a branched fan-out to simulate most cases of multichip design. The signal propagation delay and distortion have also been measured. Some of the measurement data of a seven-layer RISC (reduced-instruction-set computer) multichip module substrate are presented as a design example.
机译:为了评估性能和改进设计过程,对用于高速数字应用的共烧陶瓷多层基板的一些重要电性能进行了研究。设计了一种测试工具来实现此目标。描述了使用时域反射仪技术的测量设置和过程。总结并讨论了从测试车辆收集的数据。计算机建模已用于帮助理解数据解释,并可用于将来的设计准则。已经研究了串扰配置的几种情况。测量了上升时间,线长​​和阻抗失配对串扰的影响,并将其与建模结果进行了比较。测试车辆还包括分支扇出,以模拟大多数多芯片设计情况。还测量了信号传播延迟和失真。设计实例介绍了七层RISC(精简指令集计算机)多芯片模块基板的一些测量数据。

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