首页> 外文会议>Electron Devices Meeting, 1990. IEDM '90. Technical Digest., International >Epitaxial-base double-poly self-aligned bipolar transistors
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Epitaxial-base double-poly self-aligned bipolar transistors

机译:外延基双多晶硅自对准双极晶体管

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Reports the incorporation of Si and Si-Ge low temperature epitaxially (LTE) grown bases into an advanced submicron self-aligned double-poly device structure. The major advantages of using an LTE-base are the ability to incorporate coherently strained Si-Ge layers and to grow very thin in-situ doped layers with a boxlike dopant distribution. The epitaxial base layer was integrated using both epitaxy-after-sidewall (EAS) and epitaxy-before-sidewall approaches, and devices with an intrinsic base width of approximately=60 nm and a pinch base resistance of 5.0 k Omega / Square Operator in walled and non-walled emitter configurations were fabricated. The electrical characteristics of the walled-emitter devices obtained by the EAS approach were excellent. The application of the walled-emitter devices, due to their reduced parasitics and higher density, is very promising in high-performance low-power bipolar circuits.
机译:报告了将Si和Si-Ge低温外延(LTE)生长的碱并入先进的亚微米自对准双多晶硅器件结构中的过程。使用基于LTE的主要优点是能够合并相干应变的Si-Ge层,并能够生长出具有盒状掺杂剂分布的非常薄的原位掺杂层。外延基极层使用侧壁后外延(EAS)和侧壁前外延两种方法集成在一起,并且器件的本征基极宽度约为= 60 nm,夹层基极电阻为5.0 k Omega / Square Operator in walled并制造了无壁发射极配置。通过EAS方法获得的壁式发射极器件的电气特性非常好。由于壁式发射极器件具有降低的寄生效应和较高的密度,其应用在高性能低功率双极性电路中非常有前途。

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