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How to improve overlay of highly deformed 3D NAND wafers

机译:如何改善高度变形的3D NAND晶圆的覆盖率

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3D NAND has become the mainstream technology to support bit growth of NAND Flash. The main challenge of 3D NAND is the increased level of wafer deformation as more layers are stacked vertically. This global deformation of the substrate leads to a significant degradation of overlay performance. One potential way to address this challenge is through bow compensation by wafer backside deposition. However, it turns out that standard backside processes sometimes do not improve overlay. This study investigates this phenomenon and explores how to counter high levels of wafer deformation in a way that overlay performance does not deteriorate. Scanner monitor wafers with etched reference marks have been modified to create a variety of global warp levels, covering a wafer bow range from +300μm (bowl shape) to -550μm (umbrella shape). Subsequently, several different backside deposition processes have been applied to these wafers. Flat reference wafers, warped wafers, and compensated wafers have been then measured on NXT scanners with different wafer tables. Non-linear overlay residuals of these wafers from about lnm (flat reference wafers) to more than 30nm (uncompensated highly deformed wafers) have been measured. The obtained data reveal clear correlations between overlay, global wafer shape and backside deposition. A demonstration of the optimized overlay performance on wafers with large warpage values will be shown with a detailed analysis through absolute overlay metrology.
机译:3D NAND已成为支持NAND Flash位增长的主流技术。 3D NAND的主要挑战在于,随着垂直堆叠更多的层,晶圆变形的水平会提高。基板的这种整体变形导致覆盖性能显着降低。解决这一挑战的一种可能方法是通过晶圆背面沉积进行弓形补偿。但是,事实证明,标准的背面处理有时不能改善覆盖率。这项研究调查了这种现象,并探索了如何以不降低覆盖性能的方式应对高水平的晶圆变形。带有蚀刻参考标记的扫描仪监控晶片已经过修改,可创建多种全局翘曲水平,覆盖从+300μm(碗形)到-550μm(伞形)的晶片弓形范围。随后,已将几种不同的背面沉积工艺应用于这些晶片。然后,在具有不同晶圆台的NXT扫描仪上测量了平面参考晶圆,翘曲晶圆和补偿晶圆。已经测量了这些晶片从大约1nm(平面参考晶片)到大于30nm(未补偿的高度变形的晶片)的非线性覆盖残留物。所获得的数据揭示出覆盖层,整体晶片形状和背面沉积之间的明显相关性。通过绝对覆盖量测技术进行详细分析,将展示具有大翘曲值的晶圆上优化的覆盖性能。

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