Spatially-Varying Electrothermal Impedance Analysis for Designing Power Semiconductor Converter Systems

摘要

This paper presents an analytical methodology for designing next generation power semiconductor products to passively minimize chronic thermal-mechanical interface rate-of-degradation and actively sense a current degradation state-of-health. The paper addresses the pervasive issue that power semiconductor device electrical actuation inflicts structural damage on its assembly, and that wide-bandgap device utilization is currently limited by mechanical integration methods. This paper develops metrics fundamentally based on spatially-and temporally-variant heat transfer dynamics for identifying relationships between power electronic converter operation and local degradation modes. Spatially-varying electrothermal impedance (SETI)is defined and further processed to synthesize a dynamic thermal strain gradient rate-of-degradation metric. Then, the multi-variable frequency response function (FRF)surfaces are normalized to enable rapid identification of a transient thermal response continuum's sensitivity to different modes of degradation. The methodology is applied to a 3D transient thermal model of a switching MOSFET power electronic converter. Subsequent interpretations identify relationships that allow natural synthesis of reliability-oriented hardware design constraints to add a sensing feature and reduce over-design margin in future power semiconductor products.