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Memristor-Based CiM Architecture for Big Data Era

机译:大数据时代基于忆阻器的CiM架构

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In this paper, memristor based Computation-in-Memory (CiM) architecture is introduced to mitigate today's challenges faced with the conventional CMOS technologies and von Neumann architecture due to the emergence of Big data era. Memristor material has shown through design and simulation as presented in this paper where necessary to have high switching speed, non-volatile capability, compact density using crossbar array, chaotic and non-binary ability, almost zero power and current leakage thus making memristor-based Computation-in-Memory architecture the needed technology revolution to mitigate these Big data computing limits caused by the conventional computer architecture and CMOS process technologies. The CMOS technologies and von Neumann architecture have reached fabrication physical limit as transistor scaling goes below 45nm technology node thus resulting to increasing delays that occur in the metal interconnect for signal propagation in transistors, power leakages, low data reliability, security issues, and high cost of developing and building CMOS chip-fabrication facilities as scaling goes down below 45nm.
机译:在本文中,引入了基于忆阻器的内存计算(CiM)架构,以缓解由于大数据时代的出现而导致的常规CMOS技术和冯·诺依曼架构面临的当今挑战。忆阻器材料已通过本文中介绍的设计和仿真显示,需要具有较高的开关速度,非易失性能力,使用交叉开关阵列的紧凑密度,混沌和非二进制能力,几乎零功率和电流泄漏,因此使忆阻器材料成为基于忆阻器的材料内存计算体系结构需要技术革命,以减轻由常规计算机体系结构和CMOS处理技术引起的这些大数据计算限制。 CMOS技术和冯·诺伊曼(von Neumann)架构已达到制造物理极限,这是因为晶体管的缩放比例低于45nm技术节点,因此导致金属互连中出现的延迟增加,从而在晶体管中传播信号,漏电,数据可靠性低,安全性问题和高成本缩小到45nm以下时,开发和建造CMOS芯片制造设施的比例。

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