Scalable computation architecture in a memristor-based array.

摘要

Method for data processing based on arithmetic operations in a memristor-based crossbar, the crossbar comprising a plurality of parallel first bars extending in a first direction and a second plurality of parallel second bars extending in a second direction opposite to the first direction, such that each first bar crosses the second plurality of second bars and at each crossing forms a contact, each contact forming a memristor with at least two different programmable resistive states; including: - defining data circuit templates for data; - defining computation circuit templates for a selected arithmetic instruction from the arithmetic operations; - arranging data circuits on predetermined data locations of the array in accordance with the data circuit template and arranging instruction circuits on predetermined instructions locations of the array in accordance with the computation circuit template related to the respective arithmetic instruction by programming the memristors at the predetermined instruction locations.