Using EMC HALT for risk‐ and fault assessment: Using accelerated EMC tests for unveiling and identification of failure mechanisms in electronics provides a useful tool for risk assessment

摘要

Electronic equipment comprising safety functions must be subject to a risk analysis, where the potential impact of all kinds of environmental influence from the surroundings, including the influence from the user environment and the user self, is to be identified and handled. The HALT approach (in this case denoted High Amplitude Limit Test) provides an opportunity, where the iterative testing and design is used for identifying failure mechanisms and if possible eliminate the risk they impose on the equipment. The paper presents a summary of investigations performed using the EMC HALT approach to unveil failure mechanisms, and use this knowledge for risk assessment.