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Error analysis of tiled overlapped subarrays

机译:瓷砖重叠子阵列的误差分析

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摘要

In designing large phased arrays, it is common to design and construct a basic building block, or tile, and use duplicate tiles to build the final array. This method is important in both contiguous and overlapped subarrays. In stripline technology, the tile consists of a subarray of several elements on the top layer followed by the beamformer on the lower layers. Line bends, impedance transformers, and mutual coupling between adjacent lines can cause errors in the amplitude and phase distribution to the individual radiating elements. These errors can lead to other errors in phased arrays such as sidelobe levels and directivity. This paper presents a review of array theory as applied to both contiguous and overlapped subarrays. It also presents a method to help array designers differentiate between errors within the tile and others caused by crossovers between tiles.
机译:在设计大相控阵列时,它是常见的设计和构建基本构建块或瓷砖,并使用重复的块来构建最终数组。该方法在连续和重叠的子阵列中是重要的。在带状线技术中,瓦片包括顶层上的顶层上几个元素的子阵列,然后是下层的波束形成器。线弯曲,阻抗变换器和相邻线之间的相互耦合会导致幅度和相位分布中的错误到各个辐射元件。这些错误可能导致相位阵列中的其他错误,例如Sidelobe级别和方向性。本文介绍了应用于连续和重叠子阵列的阵列理论的审查。它还展示了一种帮助阵列设计人员区分瓦片内的错误与瓷砖之间的交叉引起的其他方法的方法。

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