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Error analysis of tiled overlapped subarrays

机译:平铺重叠子阵列的误差分析

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摘要

In designing large phased arrays, it is common to design and construct a basic building block, or tile, and use duplicate tiles to build the final array. This method is important in both contiguous and overlapped subarrays. In stripline technology, the tile consists of a subarray of several elements on the top layer followed by the beamformer on the lower layers. Line bends, impedance transformers, and mutual coupling between adjacent lines can cause errors in the amplitude and phase distribution to the individual radiating elements. These errors can lead to other errors in phased arrays such as sidelobe levels and directivity. This paper presents a review of array theory as applied to both contiguous and overlapped subarrays. It also presents a method to help array designers differentiate between errors within the tile and others caused by crossovers between tiles.
机译:在设计大型相控阵列时,通常会设计和构造一个基本的构建块或图块,并使用重复的图块来构建最终的阵列。此方法在连续和重叠子数组中都很重要。在带状线技术中,图块由顶层的几个元素的子数组组成,其后是底层的波束形成器。线弯曲,阻抗变压器以及相邻线之间的相互耦合会导致幅度和相位分布到各个辐射元件的误差。这些误差可能导致相控阵中的其他误差,例如旁瓣电平和方向性。本文介绍了适用于连续和重叠子阵列的阵列理论。它还提出了一种方法,可以帮助阵列设计人员区分图块内的错误和由图块之间的交叉引起的其他错误。

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