Loihi Asynchronous Neuromorphic Research Chip

摘要

Intel's "Loihi" neuromorphic research chip implements spiking neural networks on 128 custom cores with 1024 neurons each. It supports a wide variety of algorithms inspired by computational neuroscience, notably on-chip learning. Loihi's design is specified in the Communicating Sequential Processes (CSP) language and implemented by an automated flow that generates two-phase bundled-data (BD) asynchronous pipelines with pulsed latch datapaths. This optimizes area and energy while using a mostly standard cell library and simplifies integration with synchronous collateral. The pre-silicon design was verified by static timing analysis, back-annotated gate-level simulation, and FPGA emulation. Tunable delay lines provide sufficient timing margin in extreme corners such as near-threshold-voltage. Loihi was manufactured in Intel's 14nm ASIC process in Q4 2017 and is functional from 0.55V to 1.25V.