Analytical Modelling for nanoscale Gate Engineered Silicon-On-Nothing MOSFET with High-K dielectric

摘要

In this paper, a two-dimensional analytical model of nanoscale Gate Engineered Silicon-On-Nothing (SON) MOSFET with High-K dielectric underneath the gate has been introduced. The parabolic approximation method for solving 2-D Poisson's equation with suitable boundary conditions has been employed for determining the potential distribution function of the device. The performance comparison of High-K Gate engineered SON MOSFET Low-K dielectric has been investigated to establish superiority of the proposed structure in terms increased immunity against short channel effects (SCE). The proposed model has been validated by the close agreement between the calculated and simulated values obtained from an ATLAS simulator.