Exploiting accelerated aging effect for on-line configurability and hardware tracking

摘要

Conventional CMOS technology lacks an efficient way of realizing reconfigurability, which is a highly desired feature for applications such as hardware tracking for security. On the other hand, the traditional “undesirable” aging effect has presented a non-volatile “memory” to the CMOS chip. This paper exploits the aging effects in standard CMOS to enable non-volatile configurability to the chip for application of hardware tracking. A novel accelerated aging circuit is developed to shorten the required stress time to a few seconds of operation. Due to the significant challenges posed by process variation in advanced CMOS technology, a novel stochastic processing methodology is proposed to significantly reduce the failure rate of the tracking and detection. Combining both circuits and system level acceleration, the work of chip usage tracking can be realized within seconds of usage in contrast with days of operation from previously reported aging monitor. The design was implemented and simulated in 45nm CMOS technology with less than 25μW power consumption and compact sizes for easy insertion as a silicon IP using only core transistors. The robustness of the proposed stochastic processing technique has been verified using transistor level Monte-Carlo simulation. Compared with existing aging monitors, the proposed techniques accelerate the process by thousands of times enabling the desired online configurability.