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System and method for integrated circuit usage tracking circuit with fast tracking time for hardware security and re-configurability

机译:用于集成电路使用跟踪电路的系统和方法,具有硬件安全性和重新配置的快速跟踪时间

摘要

An accelerated aging circuit is described to shorten the required stress time to a few seconds of operation. Due to the challenges posed by process variation in advanced CMOS technology, a stochastic processing methodology is also described to reduce the failure rate of the tracking and detection. Combining both circuit and system level acceleration, the creation of a silicon marker can be realized within seconds of usage in contrast with days of operation from previously reported aging monitor.
机译:描述加速老化电路以缩短所需的应力时间到几秒钟的操作。 由于高级CMOS技术的过程变化所带来的挑战,还描述了随机处理方法来降低跟踪和检测的故障率。 结合电路和系统级加速度,可以在与先前报告的老化监测器的操作日期相比,在秒的使用秒内实现硅标记的创建。

著录项

  • 公开/公告号US11115022B2

    专利类型

  • 公开/公告日2021-09-07

    原文格式PDF

  • 申请/专利权人 NORTHWESTERN UNIVERSITY;

    申请/专利号US201615148700

  • 发明设计人 JIE GU;

    申请日2016-05-06

  • 分类号G06F1/26;H03K3/03;H03K5/24;H03K19/0175;H03K3/356;

  • 国家 US

  • 入库时间 2022-08-24 20:52:02

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