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SYSTEM AND METHOD FOR INTEGRATED CIRCUIT USAGE TRACKING CIRCUIT WITH FAST TRACKING TIME FOR HARDWARE SECURITY AND RE-CONFIGURABILITY

机译:具有快速跟踪时间的硬件使用安全性和可重新配置性的集成电路使用情况跟踪电路的系统和方法

摘要

An accelerated aging circuit is described to shorten the required stress time to a few seconds of operation. Due to the challenges posed by process variation in advanced CMOS technology, a stochastic processing methodology is also described to reduce the failure rate of the tracking and detection. Combining both circuit and system level acceleration, the creation of a silicon marker can be realized within seconds of usage in contrast with days of operation from previously reported aging monitor.
机译:描述了一种加速老化电路,可将所需的应力时间缩短到几秒钟。由于先进CMOS技术中工艺变化带来的挑战,因此还描述了一种随机处理方法以降低跟踪和检测的失败率。结合了电路级和系统级加速,与以前报告的老化监视器的工作日相比,可在使用后数秒内创建硅标记。

著录项

  • 公开/公告号US2016329897A1

    专利类型

  • 公开/公告日2016-11-10

    原文格式PDF

  • 申请/专利权人 NORTHWESTERN UNIVERSITY;

    申请/专利号US201615148700

  • 发明设计人 JIE GU;

    申请日2016-05-06

  • 分类号H03K19/0175;H03K5/24;G06F1/26;H03K3/03;

  • 国家 US

  • 入库时间 2022-08-21 14:36:14

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