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A simple approach to the realization of an FPGA-based harmonic elimination PWM generator

机译:基于FPGA的谐波消除PWM发生器实现的简单方法

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This paper presents a low-cost and effective approach to generate harmonic elimination PWM (HEPWM) waveforms for three-phase voltage-sourced inverters (VSIs). In the developed approach, the off-line computations of switching patterns based on harmonic elimination strategy are stored in EPROM, thereby allowing a microprocessor-free design. With the proposed configuration, the circuits for the adjustments of modulation index and phase angle are synthesized onto a field-programmable gate array (FPGA) by means of hardware description language (VHDL). Since the VHDL statements, contrary to regular microprocessor programs, are inherently concurrent, high-speed response for determination of circuit output (switching state associated with the specified modulation index and phase angle) can be achieved. Furthermore, in order to limit switching losses for high power applications, eight switching sets having switching angles from 3 to 17 (M=2N+1, N=1…8) in each quarter fundamental period are available. Experimental and simulation results are presented to verify the effectiveness and accuracy of the proposed configuration.
机译:本文提出了一种低成本且有效的方法,以产生谐PWM(HEPWM)用于三相电压型逆变器波形(的VSI)。在发达的方法,切换基于谐波消除策略模式离线计算被存储在EPROM,从而允许自由微处理器的设计。利用所提出的配置中,用于调制指数和相位角的调整电路由硬件描述语言(VHDL)方法合成到一个现场可编程门阵列(FPGA)。由于VHDL语句,相反常规微处理器的程序,是用于判定电路的输出(与指定的调制指数和相位角相关联的开关状态)的固有的并发的,高速响应,可以实现。此外,为了限制开关损耗对于高功率应用中,具有开关角从3至8个的开关组17(M = 2N + 1,N = 1 ... 8)的每季度基本周期是可用的。实验和仿真结果呈现给验证所提出的配置的有效性和准确性。

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