Performance Analysis of Nanoscale Double Gate MOSFETs with High-κ Gate Stack

摘要

The performance and characteristics of Double Gate MOSFET with high dielectric constant (high-κ) gate stack have been analyzed and compared with those of conventional pure SiO_2 gate MOSFET. Quantum Ballistic Transport Model has been used to demonstrate the performance of the device in terms of threshold voltage, drain current in both low and high drain voltage regions and subthreshold swing. The effect of temperature on the threshold voltage and subthreshold characteristics has also been observed. This work reveals that improved performance of this structure can be achieved by scaling the gate length and illustrates its superiority over SiO_2 gate MOSFETs in achieving long-term ITRS goals.