Fabrication of Microchannel embedded TSV interposer and its influence on TSV's electrical parameters

摘要

In this paper Microchannel embedded TSV interposer is presented, process development is proposed with direct Si-Si wafer bonding, effects of embedded cooling Microchannel on TSV's parasitic electrical parameters are analyzed with finite element analysis tool. With the developed process, Microchannel sample and Cu TSV sample are successfully fabricated. Simulation results disclose that microchannel with cooling DI water will make influence mainly on TSV's parasitic capacitance and conductance.