Estimation techniques for timing mismatch in time-interleaved analog-to-digital converters: Limitations and solutions

摘要

Time interleaving (TI) is one of the best approaches to relax the speed-power trade-off of analog-to-digital converters (ADC). However, channel mismatches especially timing can limit the resolution of TIADC if they are not addressed properly. To achieve an efficient calibration for these errors, the most difficult task is the error estimation in the digital domain. The correction is less problematic and can be done either in digital domain or in the analog domain. Two big families of estimation techniques are commonly employed: the free-band estimation and the cross-correlation estimation. This paper reviews and analyses these estimation techniques and highlights their limitations. It also presents solutions to overcome these limitations.