A Bandwidth Mismatch Optimization Technique in Time-Interleaved Analog-to-Digital Converters

摘要

In time-interleaved (TI) analog-to-digital converters (ADCs), bandwidth mismatches, caused by the limited bandwidth of input signal traces and sample circuits, seriously deteriorate the spurious-free dynamic range (SFDR) of the system. This paper analyzes the influence of bandwidth mismatch errors under different sampling sequences. Eventually, based on a randomization technique and the simulated annealing algorithm (SAA), a bandwidth mismatch optimization technique is presented that can work well with other bandwidth mismatch calibration methods. The behavior simulation results indicate that an improvement of 7 dB in the SFDR can be achieved with this technique in a 16-channel TI-ADC after timing and gain calibration.