A 4th Order CMOS 65nm Wideband Low Power Analog Filter for Wireless Receivers

摘要

A 4th -order continuous-time band-pass filter for wireless receivers is here presented. The filter is composed by the cascade of two active RC cells. The overall pass-band (32dB) gain is distributed for each cell in order to minimize the power consumption. The operating point issues due to the low V_(DD)/V_(TH) ratio - a value of 2 is typical in CMOS 6Snm technologies and down - have been solved by adding a proper bias circuit to the filter. The f_(@_3dB) deviation due to the technological spread, aging and temperature in active RC circuits is adjusted by using variable capacitor with 4 bits of resolution. The device in 65nm CMOS technology consumes 1.3mW from a single 1.2V supply voltage, features -10dBm-IIP3 and 1.6mV_(rms) output integrated noise over the pass-band - 300kHz÷8MHz.