A novel CMOS active polyphase filter with wideband and low-power for GNSS receiver

摘要

References(10) In this letter, a novel circuit architecture for active polyphase filter is proposed and analyzed. The currents produced from two source-follower with capacitor and common-source stage in a single-stage are used to realize high-pass and low-pass functions, respectively. Compared to other conventional active polyphase filters, the proposed polyphase filter uses a simpler structure to achieve strong image rejection in a wide band while obtaining lower power consumption, higher operating frequency and smaller chip area. In the 0.18-μm CMOS process, the proposed active polyphase filter occupies less than 0.65 mm2 of chip area. From the measurements, the active polyphase filter shows an image rejection ratio of 48.5 dB at frequencies of 5.5 MHz to 26.5 MHz, a voltage gain of 6.8 dB and an IIP3 of 3.8 dBm at 16 MHz while consuming only 3.1 mA from a 1.8-V supply.