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Exploring the Heterogeneous Design Space for both Performance and Reliability

机译:探索性能和可靠性的异构设计空间

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As we move into a new era of heterogeneous multi-core systems, our ability to tune the performance and understand the reliability of both hardware and software becomes more challenging. Given the multiplicity of different design trade-offs in hardware and software, and the rate of introduction of new architectures and hardware/software features, it becomes difficult to properly model emerging heterogeneous platforms. In this paper we present a new methodology to address these challenges in a flexible and extensible framework. We describe the design of a framework that supports a range of heterogeneous devices to be evaluated based on different performance/reliability criteria. We address heterogeneity both in hardware and software, providing a flexible framework that can be easily adapted and extended as new elements in the SoC stack continue to evolve. Our framework enables modeling at different levels of abstraction and interfaces to existing tools to compose hybrid modeling environments. We also consider the role of software, providing a flexible and modifiable compiler stack based on LLVM. We provide examples that highlight both the flexibility of this framework and demonstrate the utility of the tools.
机译:当我们进入异构多核系统的新时代时,我们调整性能和了解硬件和软件的可靠性的能力变得更具挑战性。鉴于硬件和软件中不同设计权衡的多种,以及新架构和硬件/软件特征的引入速率,它变得难以正确模型新兴异构平台。在本文中,我们提出了一种新的方法,可以在灵活和可扩展的框架中解决这些挑战。我们描述了一种框架的设计,该框架支持基于不同的性能/可靠性标准来评估一系列异质设备。我们在硬件和软件中解决异质性,提供一个灵活的框架,可以轻松调整和扩展,因为SOC堆栈中的新元素继续发展。我们的框架使得在不同的抽象和接口中建模为现有工具来构思混合建模环境。我们还考虑软件的作用,提供基于LLVM的灵活和可修改的编译器堆栈。我们提供了突出显示该框架的灵活性的示例,并演示了工具的实用程序。

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