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dTune: Leveraging reliable code generation for adaptive dependability tuning under process variation and aging-induced effects

机译:DTUNE:利用可靠的代码生成自适应可靠性调整的过程变化和衰老诱导的效果

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Designing dependable on-chip manycore systems is subjected to consideration of multiple reliability threats, i.e. soft errors, aging, process variation, etc. In this paper, we introduce a novel adaptive Dependability Tuning (dTune) scheme for manycore processors. It leverages the knowledge of varying vulnerability and error masking properties of different applications along with multiple compiled versions (each offering distinct reliability and performance properties). Our dTune system dynamically tunes the dependability mode at the hardware level through hybrid Redundant Multithreading tuning and at the software level through selection of reliable code version under given performance constraints. It jointly accounts for soft errors and cores' performance variations due to design-time process variation and/or run-time aging-induced performance degradation. We compare our dTune system with four different state-of-the-art techniques and achieve on average 44% and up to 63% improved task reliability for different chip configurations, different variability maps, and different aging years.
机译:设计可靠的片上多核系统考虑到多重可靠性威胁,即软误差,老化,过程变化等。在本文中,我们为多核处理器引入了一种新的自适应可靠调整(DTUNE)方案。它利用不同应用程序的不同漏洞和错误屏蔽属性以及多个编译版本(每个提供不同的可靠性和性能属性)。我们的DTUNE系统通过在给定性能约束下通过选择可靠的代码版本,动态调谐硬件级别的可靠性模式。由于设计时流程变化和/或运行时效诱导的性能下降,它共同占软错误和核心的性能变化。我们将DTUNE系统与四种不同的最先进技术进行比较,平均实现44%,提高了不同芯片配置,不同的变化地图和不同老年时期的任务可靠性高达63%。

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