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Generalizing Redundancy Elimination in Checking Sequences

机译:在检查序列时概括冗余消除

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Based on a distinguishing sequence for a Finite State Machine (FSM), an efficient checking sequence may be produced from the elements of a set of –sequences and a set ET of T–sequences, that both recognize the states, and elements of EC which represents the transitions in the FSM. An optimization algorithm may then be used to produce a reduced length checking sequence by connecting the elements of , ET , and EC using transitions taken from an acyclic set E ′′. It is known that only a subset E′C of EC is sufficient to form a checking sequence. This paper improves this result by reducing the number of elements in E′C that must be included in the generated checking sequence.
机译:基于用于有限状态机(FSM)的区分序列,可以从一组序列的元件和T序列的集合ET的元素产生有效的检查序列,其识别州和EC的元素表示FSM中的转换。然后,可以使用优化算法来通过使用从非环路集E“'的转变连接的转换来产生减小的长度检查序列。众所周知,EC的子集E'C足以形成检查序列。本文通过减少必须包含在生成的检查序列中的E'C中的元素数量来改善此结果。

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